wm8960.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8960.c -- WM8960 ALSA SoC Audio driver
  4. *
  5. * Copyright 2007-11 Wolfson Microelectronics, plc
  6. *
  7. * Author: Liam Girdwood
  8. */
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/clk.h>
  15. #include <linux/i2c.h>
  16. #include <linux/slab.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/initval.h>
  22. #include <sound/tlv.h>
  23. #include <sound/wm8960.h>
  24. #include "wm8960.h"
  25. /* R25 - Power 1 */
  26. #define WM8960_VMID_MASK 0x180
  27. #define WM8960_VREF 0x40
  28. /* R26 - Power 2 */
  29. #define WM8960_PWR2_LOUT1 0x40
  30. #define WM8960_PWR2_ROUT1 0x20
  31. #define WM8960_PWR2_OUT3 0x02
  32. /* R28 - Anti-pop 1 */
  33. #define WM8960_POBCTRL 0x80
  34. #define WM8960_BUFDCOPEN 0x10
  35. #define WM8960_BUFIOEN 0x08
  36. #define WM8960_SOFT_ST 0x04
  37. #define WM8960_HPSTBY 0x01
  38. /* R29 - Anti-pop 2 */
  39. #define WM8960_DISOP 0x40
  40. #define WM8960_DRES_MASK 0x30
  41. static bool is_pll_freq_available(unsigned int source, unsigned int target);
  42. static int wm8960_set_pll(struct snd_soc_component *component,
  43. unsigned int freq_in, unsigned int freq_out);
  44. /*
  45. * wm8960 register cache
  46. * We can't read the WM8960 register space when we are
  47. * using 2 wire for device control, so we cache them instead.
  48. */
  49. static const struct reg_default wm8960_reg_defaults[] = {
  50. { 0x0, 0x00a7 },
  51. { 0x1, 0x00a7 },
  52. { 0x2, 0x0000 },
  53. { 0x3, 0x0000 },
  54. { 0x4, 0x0000 },
  55. { 0x5, 0x0008 },
  56. { 0x6, 0x0000 },
  57. { 0x7, 0x000a },
  58. { 0x8, 0x01c0 },
  59. { 0x9, 0x0000 },
  60. { 0xa, 0x00ff },
  61. { 0xb, 0x00ff },
  62. { 0x10, 0x0000 },
  63. { 0x11, 0x007b },
  64. { 0x12, 0x0100 },
  65. { 0x13, 0x0032 },
  66. { 0x14, 0x0000 },
  67. { 0x15, 0x00c3 },
  68. { 0x16, 0x00c3 },
  69. { 0x17, 0x01c0 },
  70. { 0x18, 0x0000 },
  71. { 0x19, 0x0000 },
  72. { 0x1a, 0x0000 },
  73. { 0x1b, 0x0000 },
  74. { 0x1c, 0x0000 },
  75. { 0x1d, 0x0000 },
  76. { 0x20, 0x0100 },
  77. { 0x21, 0x0100 },
  78. { 0x22, 0x0050 },
  79. { 0x25, 0x0050 },
  80. { 0x26, 0x0000 },
  81. { 0x27, 0x0000 },
  82. { 0x28, 0x0000 },
  83. { 0x29, 0x0000 },
  84. { 0x2a, 0x0040 },
  85. { 0x2b, 0x0000 },
  86. { 0x2c, 0x0000 },
  87. { 0x2d, 0x0050 },
  88. { 0x2e, 0x0050 },
  89. { 0x2f, 0x0000 },
  90. { 0x30, 0x0002 },
  91. { 0x31, 0x0037 },
  92. { 0x33, 0x0080 },
  93. { 0x34, 0x0008 },
  94. { 0x35, 0x0031 },
  95. { 0x36, 0x0026 },
  96. { 0x37, 0x00e9 },
  97. };
  98. static bool wm8960_volatile(struct device *dev, unsigned int reg)
  99. {
  100. switch (reg) {
  101. case WM8960_RESET:
  102. return true;
  103. default:
  104. return false;
  105. }
  106. }
  107. struct wm8960_priv {
  108. struct clk *mclk;
  109. struct regmap *regmap;
  110. int (*set_bias_level)(struct snd_soc_component *,
  111. enum snd_soc_bias_level level);
  112. struct snd_soc_dapm_widget *lout1;
  113. struct snd_soc_dapm_widget *rout1;
  114. struct snd_soc_dapm_widget *out3;
  115. bool deemph;
  116. int lrclk;
  117. int bclk;
  118. int sysclk;
  119. int clk_id;
  120. int freq_in;
  121. bool is_stream_in_use[2];
  122. struct wm8960_data pdata;
  123. };
  124. #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
  125. /* enumerated controls */
  126. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  127. "Right Inverted", "Stereo Inversion"};
  128. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  129. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  130. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  131. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  132. static const char *wm8960_adc_data_output_sel[] = {
  133. "Left Data = Left ADC; Right Data = Right ADC",
  134. "Left Data = Left ADC; Right Data = Left ADC",
  135. "Left Data = Right ADC; Right Data = Right ADC",
  136. "Left Data = Right ADC; Right Data = Left ADC",
  137. };
  138. static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
  139. static const struct soc_enum wm8960_enum[] = {
  140. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  141. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  142. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  143. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  144. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  145. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  146. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
  147. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
  148. };
  149. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  150. static int wm8960_set_deemph(struct snd_soc_component *component)
  151. {
  152. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  153. int val, i, best;
  154. /* If we're using deemphasis select the nearest available sample
  155. * rate.
  156. */
  157. if (wm8960->deemph) {
  158. best = 1;
  159. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  160. if (abs(deemph_settings[i] - wm8960->lrclk) <
  161. abs(deemph_settings[best] - wm8960->lrclk))
  162. best = i;
  163. }
  164. val = best << 1;
  165. } else {
  166. val = 0;
  167. }
  168. dev_dbg(component->dev, "Set deemphasis %d\n", val);
  169. return snd_soc_component_update_bits(component, WM8960_DACCTL1,
  170. 0x6, val);
  171. }
  172. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  173. struct snd_ctl_elem_value *ucontrol)
  174. {
  175. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  176. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  177. ucontrol->value.integer.value[0] = wm8960->deemph;
  178. return 0;
  179. }
  180. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  181. struct snd_ctl_elem_value *ucontrol)
  182. {
  183. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  184. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  185. unsigned int deemph = ucontrol->value.integer.value[0];
  186. if (deemph > 1)
  187. return -EINVAL;
  188. wm8960->deemph = deemph;
  189. return wm8960_set_deemph(component);
  190. }
  191. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  192. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
  193. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  194. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  195. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  196. static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
  197. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
  198. 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
  199. 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
  200. );
  201. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  202. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  203. 0, 63, 0, inpga_tlv),
  204. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  205. 6, 1, 0),
  206. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  207. 7, 1, 1),
  208. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
  209. WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
  210. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
  211. WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
  212. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
  213. WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
  214. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
  215. WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
  216. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
  217. WM8960_RINPATH, 4, 3, 0, micboost_tlv),
  218. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
  219. WM8960_LINPATH, 4, 3, 0, micboost_tlv),
  220. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  221. 0, 255, 0, dac_tlv),
  222. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  223. 0, 127, 0, out_tlv),
  224. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  225. 7, 1, 0),
  226. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  227. 0, 127, 0, out_tlv),
  228. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  229. 7, 1, 0),
  230. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  231. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  232. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  233. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  234. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  235. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  236. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  237. wm8960_get_deemph, wm8960_put_deemph),
  238. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  239. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  240. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  241. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  242. SOC_ENUM("ALC Function", wm8960_enum[4]),
  243. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  244. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  245. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  246. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  247. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  248. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  249. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  250. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  251. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  252. SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
  253. 0, 255, 0, adc_tlv),
  254. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  255. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  256. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  257. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  258. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  259. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  260. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  261. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  262. SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
  263. SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
  264. };
  265. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  266. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  267. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  268. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  269. };
  270. static const struct snd_kcontrol_new wm8960_lin[] = {
  271. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  272. };
  273. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  274. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  275. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  276. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  277. };
  278. static const struct snd_kcontrol_new wm8960_rin[] = {
  279. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  280. };
  281. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  282. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  283. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  284. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  285. };
  286. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  287. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  288. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  289. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  290. };
  291. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  292. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  293. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  294. };
  295. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  296. SND_SOC_DAPM_INPUT("LINPUT1"),
  297. SND_SOC_DAPM_INPUT("RINPUT1"),
  298. SND_SOC_DAPM_INPUT("LINPUT2"),
  299. SND_SOC_DAPM_INPUT("RINPUT2"),
  300. SND_SOC_DAPM_INPUT("LINPUT3"),
  301. SND_SOC_DAPM_INPUT("RINPUT3"),
  302. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  303. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  304. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  305. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  306. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  307. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  308. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  309. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  310. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  311. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
  312. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
  313. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  314. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  315. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  316. &wm8960_loutput_mixer[0],
  317. ARRAY_SIZE(wm8960_loutput_mixer)),
  318. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  319. &wm8960_routput_mixer[0],
  320. ARRAY_SIZE(wm8960_routput_mixer)),
  321. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  322. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  323. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  324. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  325. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  327. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  328. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  329. SND_SOC_DAPM_OUTPUT("HP_L"),
  330. SND_SOC_DAPM_OUTPUT("HP_R"),
  331. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  332. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  333. SND_SOC_DAPM_OUTPUT("OUT3"),
  334. };
  335. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  336. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  337. &wm8960_mono_out[0],
  338. ARRAY_SIZE(wm8960_mono_out)),
  339. };
  340. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  341. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  342. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  343. };
  344. static const struct snd_soc_dapm_route audio_paths[] = {
  345. { "Left Boost Mixer", NULL , "MICB"},
  346. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  347. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  348. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  349. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
  350. { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
  351. { "Left Input Mixer", NULL, "LINPUT2" },
  352. { "Left Input Mixer", NULL, "LINPUT3" },
  353. { "Right Boost Mixer", NULL , "MICB"},
  354. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  355. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  356. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  357. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
  358. { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
  359. { "Right Input Mixer", NULL, "RINPUT2" },
  360. { "Right Input Mixer", NULL, "RINPUT3" },
  361. { "Left ADC", NULL, "Left Input Mixer" },
  362. { "Right ADC", NULL, "Right Input Mixer" },
  363. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  364. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
  365. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  366. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  367. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
  368. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  369. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  370. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  371. { "HP_L", NULL, "LOUT1 PGA" },
  372. { "HP_R", NULL, "ROUT1 PGA" },
  373. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  374. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  375. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  376. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  377. { "SPK_LN", NULL, "Left Speaker Output" },
  378. { "SPK_LP", NULL, "Left Speaker Output" },
  379. { "SPK_RN", NULL, "Right Speaker Output" },
  380. { "SPK_RP", NULL, "Right Speaker Output" },
  381. };
  382. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  383. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  384. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  385. { "OUT3", NULL, "Mono Output Mixer", }
  386. };
  387. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  388. { "HP_L", NULL, "OUT3 VMID" },
  389. { "HP_R", NULL, "OUT3 VMID" },
  390. { "OUT3 VMID", NULL, "Left Output Mixer" },
  391. { "OUT3 VMID", NULL, "Right Output Mixer" },
  392. };
  393. static int wm8960_add_widgets(struct snd_soc_component *component)
  394. {
  395. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  396. struct wm8960_data *pdata = &wm8960->pdata;
  397. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  398. struct snd_soc_dapm_widget *w;
  399. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  400. ARRAY_SIZE(wm8960_dapm_widgets));
  401. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  402. /* In capless mode OUT3 is used to provide VMID for the
  403. * headphone outputs, otherwise it is used as a mono mixer.
  404. */
  405. if (pdata && pdata->capless) {
  406. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  407. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  408. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  409. ARRAY_SIZE(audio_paths_capless));
  410. } else {
  411. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  412. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  413. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  414. ARRAY_SIZE(audio_paths_out3));
  415. }
  416. /* We need to power up the headphone output stage out of
  417. * sequence for capless mode. To save scanning the widget
  418. * list each time to find the desired power state do so now
  419. * and save the result.
  420. */
  421. list_for_each_entry(w, &component->card->widgets, list) {
  422. if (w->dapm != dapm)
  423. continue;
  424. if (strcmp(w->name, "LOUT1 PGA") == 0)
  425. wm8960->lout1 = w;
  426. if (strcmp(w->name, "ROUT1 PGA") == 0)
  427. wm8960->rout1 = w;
  428. if (strcmp(w->name, "OUT3 VMID") == 0)
  429. wm8960->out3 = w;
  430. }
  431. return 0;
  432. }
  433. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  434. unsigned int fmt)
  435. {
  436. struct snd_soc_component *component = codec_dai->component;
  437. u16 iface = 0;
  438. /* set master/slave audio interface */
  439. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  440. case SND_SOC_DAIFMT_CBM_CFM:
  441. iface |= 0x0040;
  442. break;
  443. case SND_SOC_DAIFMT_CBS_CFS:
  444. break;
  445. default:
  446. return -EINVAL;
  447. }
  448. /* interface format */
  449. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  450. case SND_SOC_DAIFMT_I2S:
  451. iface |= 0x0002;
  452. break;
  453. case SND_SOC_DAIFMT_RIGHT_J:
  454. break;
  455. case SND_SOC_DAIFMT_LEFT_J:
  456. iface |= 0x0001;
  457. break;
  458. case SND_SOC_DAIFMT_DSP_A:
  459. iface |= 0x0003;
  460. break;
  461. case SND_SOC_DAIFMT_DSP_B:
  462. iface |= 0x0013;
  463. break;
  464. default:
  465. return -EINVAL;
  466. }
  467. /* clock inversion */
  468. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  469. case SND_SOC_DAIFMT_NB_NF:
  470. break;
  471. case SND_SOC_DAIFMT_IB_IF:
  472. iface |= 0x0090;
  473. break;
  474. case SND_SOC_DAIFMT_IB_NF:
  475. iface |= 0x0080;
  476. break;
  477. case SND_SOC_DAIFMT_NB_IF:
  478. iface |= 0x0010;
  479. break;
  480. default:
  481. return -EINVAL;
  482. }
  483. /* set iface */
  484. snd_soc_component_write(component, WM8960_IFACE1, iface);
  485. return 0;
  486. }
  487. static struct {
  488. int rate;
  489. unsigned int val;
  490. } alc_rates[] = {
  491. { 48000, 0 },
  492. { 44100, 0 },
  493. { 32000, 1 },
  494. { 22050, 2 },
  495. { 24000, 2 },
  496. { 16000, 3 },
  497. { 11025, 4 },
  498. { 12000, 4 },
  499. { 8000, 5 },
  500. };
  501. /* -1 for reserved value */
  502. static const int sysclk_divs[] = { 1, -1, 2, -1 };
  503. /* Multiply 256 for internal 256 div */
  504. static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
  505. /* Multiply 10 to eliminate decimials */
  506. static const int bclk_divs[] = {
  507. 10, 15, 20, 30, 40, 55, 60, 80, 110,
  508. 120, 160, 220, 240, 320, 320, 320
  509. };
  510. static int wm8960_configure_clocking(struct snd_soc_component *component)
  511. {
  512. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  513. int sysclk, bclk, lrclk, freq_out, freq_in;
  514. u16 iface1 = snd_soc_component_read32(component, WM8960_IFACE1);
  515. int i, j, k;
  516. if (!(iface1 & (1<<6))) {
  517. dev_dbg(component->dev,
  518. "Codec is slave mode, no need to configure clock\n");
  519. //return 0;
  520. }
  521. if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
  522. dev_err(component->dev, "No MCLK configured\n");
  523. return -EINVAL;
  524. }
  525. freq_in = wm8960->freq_in;
  526. bclk = wm8960->bclk;
  527. lrclk = wm8960->lrclk;
  528. //printk("clk_id %d freq_in: %d bclk: %d lrclk: %d\n",wm8960->clk_id ,freq_in, bclk,lrclk);
  529. /*
  530. * If it's sysclk auto mode, check if the MCLK can provide sysclk or
  531. * not. If MCLK can provide sysclk, using MCLK to provide sysclk
  532. * directly. Otherwise, auto select a available pll out frequency
  533. * and set PLL.
  534. */
  535. if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
  536. /* disable the PLL and using MCLK to provide sysclk */
  537. wm8960_set_pll(component, 0, 0);
  538. freq_out = freq_in;
  539. } else if (wm8960->sysclk) {
  540. freq_out = wm8960->sysclk;
  541. } else {
  542. dev_err(component->dev, "No SYSCLK configured\n");
  543. return -EINVAL;
  544. }
  545. if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
  546. /* check if the sysclk frequency is available. */
  547. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  548. if (sysclk_divs[i] == -1)
  549. continue;
  550. sysclk = freq_out / sysclk_divs[i];
  551. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  552. if (sysclk != dac_divs[j] * lrclk)
  553. continue;
  554. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
  555. if (sysclk == bclk * bclk_divs[k] / 10)
  556. break;
  557. if (k != ARRAY_SIZE(bclk_divs))
  558. break;
  559. }
  560. if (j != ARRAY_SIZE(dac_divs))
  561. break;
  562. }
  563. if (i != ARRAY_SIZE(sysclk_divs)) {
  564. goto configure_clock;
  565. } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
  566. dev_err(component->dev, "failed to configure clock\n");
  567. return -EINVAL;
  568. }
  569. }
  570. /* get a available pll out frequency and set pll */
  571. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  572. if (sysclk_divs[i] == -1)
  573. continue;
  574. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  575. sysclk = lrclk * dac_divs[j];
  576. freq_out = sysclk * sysclk_divs[i];
  577. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  578. if (sysclk == bclk * bclk_divs[k] / 10 &&
  579. is_pll_freq_available(freq_in, freq_out)) {
  580. wm8960_set_pll(component,
  581. freq_in, freq_out);
  582. break;
  583. } else {
  584. continue;
  585. }
  586. }
  587. if (k != ARRAY_SIZE(bclk_divs))
  588. break;
  589. }
  590. if (j != ARRAY_SIZE(dac_divs))
  591. break;
  592. }
  593. if (i == ARRAY_SIZE(sysclk_divs)) {
  594. dev_err(component->dev, "failed to configure clock\n");
  595. return -EINVAL;
  596. }
  597. configure_clock:
  598. /* configure sysclk clock */
  599. snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
  600. /* configure frame clock */
  601. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
  602. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
  603. /* configure bit clock */
  604. snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
  605. return 0;
  606. }
  607. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  608. struct snd_pcm_hw_params *params,
  609. struct snd_soc_dai *dai)
  610. {
  611. struct snd_soc_component *component = dai->component;
  612. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  613. u16 iface = snd_soc_component_read32(component, WM8960_IFACE1) & 0xfff3;
  614. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  615. int i;
  616. wm8960->bclk = snd_soc_params_to_bclk(params);
  617. if (params_channels(params) == 1)
  618. wm8960->bclk *= 2;
  619. /* bit size */
  620. switch (params_width(params)) {
  621. case 16:
  622. break;
  623. case 20:
  624. iface |= 0x0004;
  625. break;
  626. case 24:
  627. iface |= 0x0008;
  628. break;
  629. case 32:
  630. /* right justify mode does not support 32 word length */
  631. if ((iface & 0x3) != 0) {
  632. iface |= 0x000c;
  633. break;
  634. }
  635. /* fall through */
  636. default:
  637. dev_err(component->dev, "unsupported width %d\n",
  638. params_width(params));
  639. return -EINVAL;
  640. }
  641. wm8960->lrclk = params_rate(params);
  642. /* Update filters for the new rate */
  643. if (tx) {
  644. wm8960_set_deemph(component);
  645. } else {
  646. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  647. if (alc_rates[i].rate == params_rate(params))
  648. snd_soc_component_update_bits(component,
  649. WM8960_ADDCTL3, 0x7,
  650. alc_rates[i].val);
  651. }
  652. /* set iface */
  653. snd_soc_component_write(component, WM8960_IFACE1, iface);
  654. wm8960->is_stream_in_use[tx] = true;
  655. if (!wm8960->is_stream_in_use[!tx])
  656. return wm8960_configure_clocking(component);
  657. return 0;
  658. }
  659. static int wm8960_hw_free(struct snd_pcm_substream *substream,
  660. struct snd_soc_dai *dai)
  661. {
  662. struct snd_soc_component *component = dai->component;
  663. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  664. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  665. wm8960->is_stream_in_use[tx] = false;
  666. return 0;
  667. }
  668. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  669. {
  670. struct snd_soc_component *component = dai->component;
  671. if (mute)
  672. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
  673. else
  674. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
  675. return 0;
  676. }
  677. static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
  678. enum snd_soc_bias_level level)
  679. {
  680. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  681. u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
  682. int ret;
  683. switch (level) {
  684. case SND_SOC_BIAS_ON:
  685. break;
  686. case SND_SOC_BIAS_PREPARE:
  687. switch (snd_soc_component_get_bias_level(component)) {
  688. case SND_SOC_BIAS_STANDBY:
  689. if (!IS_ERR(wm8960->mclk)) {
  690. ret = clk_prepare_enable(wm8960->mclk);
  691. if (ret) {
  692. dev_err(component->dev,
  693. "Failed to enable MCLK: %d\n",
  694. ret);
  695. return ret;
  696. }
  697. }
  698. ret = wm8960_configure_clocking(component);
  699. if (ret)
  700. return ret;
  701. /* Set VMID to 2x50k */
  702. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
  703. break;
  704. case SND_SOC_BIAS_ON:
  705. /*
  706. * If it's sysclk auto mode, and the pll is enabled,
  707. * disable the pll
  708. */
  709. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  710. wm8960_set_pll(component, 0, 0);
  711. if (!IS_ERR(wm8960->mclk))
  712. clk_disable_unprepare(wm8960->mclk);
  713. break;
  714. default:
  715. break;
  716. }
  717. break;
  718. case SND_SOC_BIAS_STANDBY:
  719. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  720. regcache_sync(wm8960->regmap);
  721. /* Enable anti-pop features */
  722. snd_soc_component_write(component, WM8960_APOP1,
  723. WM8960_POBCTRL | WM8960_SOFT_ST |
  724. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  725. /* Enable & ramp VMID at 2x50k */
  726. snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
  727. msleep(100);
  728. /* Enable VREF */
  729. snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
  730. WM8960_VREF);
  731. /* Disable anti-pop features */
  732. snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
  733. }
  734. /* Set VMID to 2x250k */
  735. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
  736. break;
  737. case SND_SOC_BIAS_OFF:
  738. /* Enable anti-pop features */
  739. snd_soc_component_write(component, WM8960_APOP1,
  740. WM8960_POBCTRL | WM8960_SOFT_ST |
  741. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  742. /* Disable VMID and VREF, let them discharge */
  743. snd_soc_component_write(component, WM8960_POWER1, 0);
  744. msleep(600);
  745. break;
  746. }
  747. return 0;
  748. }
  749. static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
  750. enum snd_soc_bias_level level)
  751. {
  752. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  753. u16 pm2 = snd_soc_component_read32(component, WM8960_POWER2);
  754. int reg, ret;
  755. switch (level) {
  756. case SND_SOC_BIAS_ON:
  757. break;
  758. case SND_SOC_BIAS_PREPARE:
  759. switch (snd_soc_component_get_bias_level(component)) {
  760. case SND_SOC_BIAS_STANDBY:
  761. /* Enable anti pop mode */
  762. snd_soc_component_update_bits(component, WM8960_APOP1,
  763. WM8960_POBCTRL | WM8960_SOFT_ST |
  764. WM8960_BUFDCOPEN,
  765. WM8960_POBCTRL | WM8960_SOFT_ST |
  766. WM8960_BUFDCOPEN);
  767. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  768. reg = 0;
  769. if (wm8960->lout1 && wm8960->lout1->power)
  770. reg |= WM8960_PWR2_LOUT1;
  771. if (wm8960->rout1 && wm8960->rout1->power)
  772. reg |= WM8960_PWR2_ROUT1;
  773. if (wm8960->out3 && wm8960->out3->power)
  774. reg |= WM8960_PWR2_OUT3;
  775. snd_soc_component_update_bits(component, WM8960_POWER2,
  776. WM8960_PWR2_LOUT1 |
  777. WM8960_PWR2_ROUT1 |
  778. WM8960_PWR2_OUT3, reg);
  779. /* Enable VMID at 2*50k */
  780. snd_soc_component_update_bits(component, WM8960_POWER1,
  781. WM8960_VMID_MASK, 0x80);
  782. /* Ramp */
  783. msleep(100);
  784. /* Enable VREF */
  785. snd_soc_component_update_bits(component, WM8960_POWER1,
  786. WM8960_VREF, WM8960_VREF);
  787. msleep(100);
  788. if (!IS_ERR(wm8960->mclk)) {
  789. ret = clk_prepare_enable(wm8960->mclk);
  790. if (ret) {
  791. dev_err(component->dev,
  792. "Failed to enable MCLK: %d\n",
  793. ret);
  794. return ret;
  795. }
  796. }
  797. ret = wm8960_configure_clocking(component);
  798. if (ret)
  799. return ret;
  800. break;
  801. case SND_SOC_BIAS_ON:
  802. /*
  803. * If it's sysclk auto mode, and the pll is enabled,
  804. * disable the pll
  805. */
  806. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  807. wm8960_set_pll(component, 0, 0);
  808. if (!IS_ERR(wm8960->mclk))
  809. clk_disable_unprepare(wm8960->mclk);
  810. /* Enable anti-pop mode */
  811. snd_soc_component_update_bits(component, WM8960_APOP1,
  812. WM8960_POBCTRL | WM8960_SOFT_ST |
  813. WM8960_BUFDCOPEN,
  814. WM8960_POBCTRL | WM8960_SOFT_ST |
  815. WM8960_BUFDCOPEN);
  816. /* Disable VMID and VREF */
  817. snd_soc_component_update_bits(component, WM8960_POWER1,
  818. WM8960_VREF | WM8960_VMID_MASK, 0);
  819. break;
  820. case SND_SOC_BIAS_OFF:
  821. regcache_sync(wm8960->regmap);
  822. break;
  823. default:
  824. break;
  825. }
  826. break;
  827. case SND_SOC_BIAS_STANDBY:
  828. switch (snd_soc_component_get_bias_level(component)) {
  829. case SND_SOC_BIAS_PREPARE:
  830. /* Disable HP discharge */
  831. snd_soc_component_update_bits(component, WM8960_APOP2,
  832. WM8960_DISOP | WM8960_DRES_MASK,
  833. 0);
  834. /* Disable anti-pop features */
  835. snd_soc_component_update_bits(component, WM8960_APOP1,
  836. WM8960_POBCTRL | WM8960_SOFT_ST |
  837. WM8960_BUFDCOPEN,
  838. WM8960_POBCTRL | WM8960_SOFT_ST |
  839. WM8960_BUFDCOPEN);
  840. break;
  841. default:
  842. break;
  843. }
  844. break;
  845. case SND_SOC_BIAS_OFF:
  846. break;
  847. }
  848. return 0;
  849. }
  850. /* PLL divisors */
  851. struct _pll_div {
  852. u32 pre_div:1;
  853. u32 n:4;
  854. u32 k:24;
  855. };
  856. static bool is_pll_freq_available(unsigned int source, unsigned int target)
  857. {
  858. unsigned int Ndiv;
  859. if (source == 0 || target == 0)
  860. return false;
  861. /* Scale up target to PLL operating frequency */
  862. target *= 4;
  863. Ndiv = target / source;
  864. if (Ndiv < 6) {
  865. source >>= 1;
  866. Ndiv = target / source;
  867. }
  868. if ((Ndiv < 6) || (Ndiv > 12))
  869. return false;
  870. return true;
  871. }
  872. /* The size in bits of the pll divide multiplied by 10
  873. * to allow rounding later */
  874. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  875. static int pll_factors(unsigned int source, unsigned int target,
  876. struct _pll_div *pll_div)
  877. {
  878. unsigned long long Kpart;
  879. unsigned int K, Ndiv, Nmod;
  880. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  881. /* Scale up target to PLL operating frequency */
  882. target *= 4;
  883. Ndiv = target / source;
  884. if (Ndiv < 6) {
  885. source >>= 1;
  886. pll_div->pre_div = 1;
  887. Ndiv = target / source;
  888. } else
  889. pll_div->pre_div = 0;
  890. if ((Ndiv < 6) || (Ndiv > 12)) {
  891. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  892. return -EINVAL;
  893. }
  894. pll_div->n = Ndiv;
  895. Nmod = target % source;
  896. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  897. do_div(Kpart, source);
  898. K = Kpart & 0xFFFFFFFF;
  899. /* Check if we need to round */
  900. if ((K % 10) >= 5)
  901. K += 5;
  902. /* Move down to proper range now rounding is done */
  903. K /= 10;
  904. pll_div->k = K;
  905. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  906. pll_div->n, pll_div->k, pll_div->pre_div);
  907. return 0;
  908. }
  909. static int wm8960_set_pll(struct snd_soc_component *component,
  910. unsigned int freq_in, unsigned int freq_out)
  911. {
  912. u16 reg;
  913. static struct _pll_div pll_div;
  914. int ret;
  915. if (freq_in && freq_out) {
  916. ret = pll_factors(freq_in, freq_out, &pll_div);
  917. if (ret != 0)
  918. return ret;
  919. }
  920. /* Disable the PLL: even if we are changing the frequency the
  921. * PLL needs to be disabled while we do so. */
  922. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
  923. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
  924. if (!freq_in || !freq_out)
  925. return 0;
  926. reg = snd_soc_component_read32(component, WM8960_PLL1) & ~0x3f;
  927. reg |= pll_div.pre_div << 4;
  928. reg |= pll_div.n;
  929. if (pll_div.k) {
  930. reg |= 0x20;
  931. snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  932. snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  933. snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
  934. }
  935. snd_soc_component_write(component, WM8960_PLL1, reg);
  936. /* Turn it on */
  937. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
  938. msleep(250);
  939. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
  940. return 0;
  941. }
  942. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  943. int source, unsigned int freq_in, unsigned int freq_out)
  944. {
  945. struct snd_soc_component *component = codec_dai->component;
  946. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  947. wm8960->freq_in = freq_in;
  948. if (pll_id == WM8960_SYSCLK_AUTO)
  949. return 0;
  950. return wm8960_set_pll(component, freq_in, freq_out);
  951. }
  952. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  953. int div_id, int div)
  954. {
  955. struct snd_soc_component *component = codec_dai->component;
  956. u16 reg;
  957. switch (div_id) {
  958. case WM8960_SYSCLKDIV:
  959. reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1f9;
  960. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  961. break;
  962. case WM8960_DACDIV:
  963. reg = snd_soc_component_read32(component, WM8960_CLOCK1) & 0x1c7;
  964. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  965. break;
  966. case WM8960_OPCLKDIV:
  967. reg = snd_soc_component_read32(component, WM8960_PLL1) & 0x03f;
  968. snd_soc_component_write(component, WM8960_PLL1, reg | div);
  969. break;
  970. case WM8960_DCLKDIV:
  971. reg = snd_soc_component_read32(component, WM8960_CLOCK2) & 0x03f;
  972. snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
  973. break;
  974. case WM8960_TOCLKSEL:
  975. reg = snd_soc_component_read32(component, WM8960_ADDCTL1) & 0x1fd;
  976. snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
  977. break;
  978. default:
  979. return -EINVAL;
  980. }
  981. return 0;
  982. }
  983. static int wm8960_set_bias_level(struct snd_soc_component *component,
  984. enum snd_soc_bias_level level)
  985. {
  986. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  987. return wm8960->set_bias_level(component, level);
  988. }
  989. static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  990. unsigned int freq, int dir)
  991. {
  992. struct snd_soc_component *component = dai->component;
  993. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  994. clk_id = WM8960_SYSCLK_PLL;
  995. switch (clk_id) {
  996. case WM8960_SYSCLK_MCLK:
  997. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  998. 0x1, WM8960_SYSCLK_MCLK);
  999. break;
  1000. case WM8960_SYSCLK_PLL:
  1001. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  1002. 0x1, WM8960_SYSCLK_PLL);
  1003. break;
  1004. case WM8960_SYSCLK_AUTO:
  1005. break;
  1006. default:
  1007. return -EINVAL;
  1008. }
  1009. wm8960->freq_in = 24000000;
  1010. wm8960->sysclk = freq;
  1011. wm8960->clk_id = clk_id;
  1012. return 0;
  1013. }
  1014. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  1015. #define WM8960_FORMATS \
  1016. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1017. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1018. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  1019. .hw_params = wm8960_hw_params,
  1020. .hw_free = wm8960_hw_free,
  1021. .digital_mute = wm8960_mute,
  1022. .set_fmt = wm8960_set_dai_fmt,
  1023. .set_clkdiv = wm8960_set_dai_clkdiv,
  1024. .set_pll = wm8960_set_dai_pll,
  1025. .set_sysclk = wm8960_set_dai_sysclk,
  1026. };
  1027. static struct snd_soc_dai_driver wm8960_dai = {
  1028. .name = "wm8960-hifi",
  1029. .playback = {
  1030. .stream_name = "Playback",
  1031. .channels_min = 1,
  1032. .channels_max = 2,
  1033. .rates = WM8960_RATES,
  1034. .formats = WM8960_FORMATS,},
  1035. .capture = {
  1036. .stream_name = "Capture",
  1037. .channels_min = 1,
  1038. .channels_max = 2,
  1039. .rates = WM8960_RATES,
  1040. .formats = WM8960_FORMATS,},
  1041. .ops = &wm8960_dai_ops,
  1042. .symmetric_rates = 1,
  1043. };
  1044. static int wm8960_probe(struct snd_soc_component *component)
  1045. {
  1046. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1047. struct wm8960_data *pdata = &wm8960->pdata;
  1048. if (pdata->capless)
  1049. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  1050. else
  1051. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  1052. snd_soc_add_component_controls(component, wm8960_snd_controls,
  1053. ARRAY_SIZE(wm8960_snd_controls));
  1054. wm8960_add_widgets(component);
  1055. return 0;
  1056. }
  1057. static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
  1058. .probe = wm8960_probe,
  1059. .set_bias_level = wm8960_set_bias_level,
  1060. .suspend_bias_off = 1,
  1061. .idle_bias_on = 1,
  1062. .use_pmdown_time = 1,
  1063. .endianness = 1,
  1064. .non_legacy_dai_naming = 1,
  1065. };
  1066. static const struct regmap_config wm8960_regmap = {
  1067. .reg_bits = 7,
  1068. .val_bits = 9,
  1069. .max_register = WM8960_PLL4,
  1070. .reg_defaults = wm8960_reg_defaults,
  1071. .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
  1072. .cache_type = REGCACHE_RBTREE,
  1073. .volatile_reg = wm8960_volatile,
  1074. };
  1075. static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
  1076. struct wm8960_data *pdata)
  1077. {
  1078. const struct device_node *np = i2c->dev.of_node;
  1079. if (of_property_read_bool(np, "wlf,capless"))
  1080. pdata->capless = true;
  1081. if (of_property_read_bool(np, "wlf,shared-lrclk"))
  1082. pdata->shared_lrclk = true;
  1083. }
  1084. static int wm8960_i2c_probe(struct i2c_client *i2c,
  1085. const struct i2c_device_id *id)
  1086. {
  1087. struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
  1088. struct wm8960_priv *wm8960;
  1089. int ret;
  1090. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  1091. GFP_KERNEL);
  1092. if (wm8960 == NULL)
  1093. return -ENOMEM;
  1094. wm8960->clk_id = WM8960_SYSCLK_PLL;
  1095. wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
  1096. if (IS_ERR(wm8960->mclk)) {
  1097. if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
  1098. return -EPROBE_DEFER;
  1099. }
  1100. wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
  1101. if (IS_ERR(wm8960->regmap))
  1102. return PTR_ERR(wm8960->regmap);
  1103. if (pdata)
  1104. memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
  1105. else if (i2c->dev.of_node)
  1106. wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
  1107. ret = wm8960_reset(wm8960->regmap);
  1108. if (ret != 0) {
  1109. dev_err(&i2c->dev, "Failed to issue reset\n");
  1110. return ret;
  1111. }
  1112. if (wm8960->pdata.shared_lrclk) {
  1113. ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
  1114. 0x4, 0x4);
  1115. if (ret != 0) {
  1116. dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
  1117. ret);
  1118. return ret;
  1119. }
  1120. }
  1121. /* Latch the update bits */
  1122. regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
  1123. regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
  1124. regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
  1125. regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
  1126. regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
  1127. regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
  1128. regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
  1129. regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
  1130. regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
  1131. regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
  1132. i2c_set_clientdata(i2c, wm8960);
  1133. ret = devm_snd_soc_register_component(&i2c->dev,
  1134. &soc_component_dev_wm8960, &wm8960_dai, 1);
  1135. return ret;
  1136. }
  1137. static int wm8960_i2c_remove(struct i2c_client *client)
  1138. {
  1139. snd_soc_unregister_component(&client->dev);
  1140. return 0;
  1141. }
  1142. static const struct i2c_device_id wm8960_i2c_id[] = {
  1143. { "wm8960", 0 },
  1144. { }
  1145. };
  1146. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  1147. static const struct of_device_id wm8960_of_match[] = {
  1148. { .compatible = "wlf,wm8960", },
  1149. { }
  1150. };
  1151. MODULE_DEVICE_TABLE(of, wm8960_of_match);
  1152. static struct i2c_driver wm8960_i2c_driver = {
  1153. .driver = {
  1154. .name = "wm8960",
  1155. .of_match_table = wm8960_of_match,
  1156. },
  1157. .probe = wm8960_i2c_probe,
  1158. .remove = wm8960_i2c_remove,
  1159. .id_table = wm8960_i2c_id,
  1160. };
  1161. module_i2c_driver(wm8960_i2c_driver);
  1162. MODULE_DESCRIPTION("ASoC WM8960 driver");
  1163. MODULE_AUTHOR("Liam Girdwood");
  1164. MODULE_LICENSE("GPL");