wm8960.c 37 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Copyright 2007-11 Wolfson Microelectronics, plc
  5. *
  6. * Author: Liam Girdwood
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/clk.h>
  18. #include <linux/i2c.h>
  19. #include <linux/slab.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/soc.h>
  24. #include <sound/initval.h>
  25. #include <sound/tlv.h>
  26. #include <sound/wm8960.h>
  27. #include "kernel_version_4_18.h"
  28. #include "wm8960.h"
  29. /* R25 - Power 1 */
  30. #define WM8960_VMID_MASK 0x180
  31. #define WM8960_VREF 0x40
  32. /* R26 - Power 2 */
  33. #define WM8960_PWR2_LOUT1 0x40
  34. #define WM8960_PWR2_ROUT1 0x20
  35. #define WM8960_PWR2_OUT3 0x02
  36. /* R28 - Anti-pop 1 */
  37. #define WM8960_POBCTRL 0x80
  38. #define WM8960_BUFDCOPEN 0x10
  39. #define WM8960_BUFIOEN 0x08
  40. #define WM8960_SOFT_ST 0x04
  41. #define WM8960_HPSTBY 0x01
  42. /* R29 - Anti-pop 2 */
  43. #define WM8960_DISOP 0x40
  44. #define WM8960_DRES_MASK 0x30
  45. static bool is_pll_freq_available(unsigned int source, unsigned int target);
  46. static int wm8960_set_pll(struct snd_soc_codec *codec,
  47. unsigned int freq_in, unsigned int freq_out);
  48. /*
  49. * wm8960 register cache
  50. * We can't read the WM8960 register space when we are
  51. * using 2 wire for device control, so we cache them instead.
  52. */
  53. static const struct reg_default wm8960_reg_defaults[] = {
  54. { 0x0, 0x00a7 },
  55. { 0x1, 0x00a7 },
  56. { 0x2, 0x0000 },
  57. { 0x3, 0x0000 },
  58. { 0x4, 0x0000 },
  59. { 0x5, 0x0008 },
  60. { 0x6, 0x0000 },
  61. { 0x7, 0x000a },
  62. { 0x8, 0x01c0 },
  63. { 0x9, 0x0000 },
  64. { 0xa, 0x00ff },
  65. { 0xb, 0x00ff },
  66. { 0x10, 0x0000 },
  67. { 0x11, 0x007b },
  68. { 0x12, 0x0100 },
  69. { 0x13, 0x0032 },
  70. { 0x14, 0x0000 },
  71. { 0x15, 0x00c3 },
  72. { 0x16, 0x00c3 },
  73. { 0x17, 0x01c0 },
  74. { 0x18, 0x0000 },
  75. { 0x19, 0x0000 },
  76. { 0x1a, 0x0000 },
  77. { 0x1b, 0x0000 },
  78. { 0x1c, 0x0000 },
  79. { 0x1d, 0x0000 },
  80. { 0x20, 0x0100 },
  81. { 0x21, 0x0100 },
  82. { 0x22, 0x0050 },
  83. { 0x25, 0x0050 },
  84. { 0x26, 0x0000 },
  85. { 0x27, 0x0000 },
  86. { 0x28, 0x0000 },
  87. { 0x29, 0x0000 },
  88. { 0x2a, 0x0040 },
  89. { 0x2b, 0x0000 },
  90. { 0x2c, 0x0000 },
  91. { 0x2d, 0x0050 },
  92. { 0x2e, 0x0050 },
  93. { 0x2f, 0x0000 },
  94. { 0x30, 0x0002 },
  95. { 0x31, 0x0037 },
  96. { 0x33, 0x0080 },
  97. { 0x34, 0x0008 },
  98. { 0x35, 0x0031 },
  99. { 0x36, 0x0026 },
  100. { 0x37, 0x00e9 },
  101. };
  102. static bool wm8960_volatile(struct device *dev, unsigned int reg)
  103. {
  104. switch (reg) {
  105. case WM8960_RESET:
  106. return true;
  107. default:
  108. return false;
  109. }
  110. }
  111. struct wm8960_priv {
  112. struct clk *mclk;
  113. struct regmap *regmap;
  114. int (*set_bias_level)(struct snd_soc_codec *,
  115. enum snd_soc_bias_level level);
  116. struct snd_soc_dapm_widget *lout1;
  117. struct snd_soc_dapm_widget *rout1;
  118. struct snd_soc_dapm_widget *out3;
  119. bool deemph;
  120. int lrclk;
  121. int bclk;
  122. int sysclk;
  123. int clk_id;
  124. int freq_in;
  125. bool is_stream_in_use[2];
  126. struct wm8960_data pdata;
  127. };
  128. #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
  129. /* enumerated controls */
  130. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  131. "Right Inverted", "Stereo Inversion"};
  132. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  133. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  134. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  135. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  136. static const char *wm8960_adc_data_output_sel[] = {
  137. "Left Data = Left ADC; Right Data = Right ADC",
  138. "Left Data = Left ADC; Right Data = Left ADC",
  139. "Left Data = Right ADC; Right Data = Right ADC",
  140. "Left Data = Right ADC; Right Data = Left ADC",
  141. };
  142. static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
  143. static const struct soc_enum wm8960_enum[] = {
  144. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  145. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  146. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  147. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  148. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  149. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  150. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
  151. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
  152. };
  153. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  154. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  155. {
  156. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  157. int val, i, best;
  158. /* If we're using deemphasis select the nearest available sample
  159. * rate.
  160. */
  161. if (wm8960->deemph) {
  162. best = 1;
  163. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  164. if (abs(deemph_settings[i] - wm8960->lrclk) <
  165. abs(deemph_settings[best] - wm8960->lrclk))
  166. best = i;
  167. }
  168. val = best << 1;
  169. } else {
  170. val = 0;
  171. }
  172. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  173. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  174. 0x6, val);
  175. }
  176. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  177. struct snd_ctl_elem_value *ucontrol)
  178. {
  179. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  180. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  181. ucontrol->value.integer.value[0] = wm8960->deemph;
  182. return 0;
  183. }
  184. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  185. struct snd_ctl_elem_value *ucontrol)
  186. {
  187. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  188. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  189. unsigned int deemph = ucontrol->value.integer.value[0];
  190. if (deemph > 1)
  191. return -EINVAL;
  192. wm8960->deemph = deemph;
  193. return wm8960_set_deemph(codec);
  194. }
  195. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  196. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
  197. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  198. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  199. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  200. static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
  201. static const DECLARE_TLV_DB_RANGE(micboost_tlv,
  202. 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
  203. 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
  204. );
  205. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  206. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  207. 0, 63, 0, inpga_tlv),
  208. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  209. 6, 1, 0),
  210. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  211. 7, 1, 1),
  212. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
  213. WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
  214. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
  215. WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
  216. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
  217. WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
  218. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
  219. WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
  220. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
  221. WM8960_RINPATH, 4, 3, 0, micboost_tlv),
  222. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
  223. WM8960_LINPATH, 4, 3, 0, micboost_tlv),
  224. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  225. 0, 255, 0, dac_tlv),
  226. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  227. 0, 127, 0, out_tlv),
  228. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  229. 7, 1, 0),
  230. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  231. 0, 127, 0, out_tlv),
  232. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  233. 7, 1, 0),
  234. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  235. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  236. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  237. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  238. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  239. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  240. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  241. wm8960_get_deemph, wm8960_put_deemph),
  242. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  243. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  244. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  245. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  246. SOC_ENUM("ALC Function", wm8960_enum[4]),
  247. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  248. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  249. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  250. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  251. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  252. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  253. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  254. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  255. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  256. SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
  257. 0, 255, 0, adc_tlv),
  258. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  259. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  260. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  261. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  262. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  263. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  264. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  265. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  266. SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
  267. SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
  268. };
  269. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  270. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  271. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  272. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  273. };
  274. static const struct snd_kcontrol_new wm8960_lin[] = {
  275. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  276. };
  277. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  278. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  279. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  280. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  281. };
  282. static const struct snd_kcontrol_new wm8960_rin[] = {
  283. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  284. };
  285. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  286. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  287. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  288. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  289. };
  290. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  291. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  292. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  293. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  294. };
  295. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  296. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  297. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  298. };
  299. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  300. SND_SOC_DAPM_INPUT("LINPUT1"),
  301. SND_SOC_DAPM_INPUT("RINPUT1"),
  302. SND_SOC_DAPM_INPUT("LINPUT2"),
  303. SND_SOC_DAPM_INPUT("RINPUT2"),
  304. SND_SOC_DAPM_INPUT("LINPUT3"),
  305. SND_SOC_DAPM_INPUT("RINPUT3"),
  306. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  307. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  308. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  309. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  310. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  311. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  312. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  313. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  314. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  315. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
  316. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
  317. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  318. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  319. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  320. &wm8960_loutput_mixer[0],
  321. ARRAY_SIZE(wm8960_loutput_mixer)),
  322. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  323. &wm8960_routput_mixer[0],
  324. ARRAY_SIZE(wm8960_routput_mixer)),
  325. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  327. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  328. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  329. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  330. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  331. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  332. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  333. SND_SOC_DAPM_OUTPUT("HP_L"),
  334. SND_SOC_DAPM_OUTPUT("HP_R"),
  335. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  336. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  337. SND_SOC_DAPM_OUTPUT("OUT3"),
  338. };
  339. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  340. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  341. &wm8960_mono_out[0],
  342. ARRAY_SIZE(wm8960_mono_out)),
  343. };
  344. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  345. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  346. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  347. };
  348. static const struct snd_soc_dapm_route audio_paths[] = {
  349. { "Left Boost Mixer", NULL , "MICB"},
  350. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  351. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  352. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  353. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
  354. { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
  355. { "Left Input Mixer", NULL, "LINPUT2" },
  356. { "Left Input Mixer", NULL, "LINPUT3" },
  357. { "Right Boost Mixer", NULL , "MICB"},
  358. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  359. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  360. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  361. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
  362. { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
  363. { "Right Input Mixer", NULL, "RINPUT2" },
  364. { "Right Input Mixer", NULL, "RINPUT3" },
  365. { "Left ADC", NULL, "Left Input Mixer" },
  366. { "Right ADC", NULL, "Right Input Mixer" },
  367. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  368. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
  369. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  370. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  371. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
  372. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  373. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  374. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  375. { "HP_L", NULL, "LOUT1 PGA" },
  376. { "HP_R", NULL, "ROUT1 PGA" },
  377. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  378. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  379. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  380. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  381. { "SPK_LN", NULL, "Left Speaker Output" },
  382. { "SPK_LP", NULL, "Left Speaker Output" },
  383. { "SPK_RN", NULL, "Right Speaker Output" },
  384. { "SPK_RP", NULL, "Right Speaker Output" },
  385. };
  386. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  387. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  388. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  389. { "OUT3", NULL, "Mono Output Mixer", }
  390. };
  391. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  392. { "HP_L", NULL, "OUT3 VMID" },
  393. { "HP_R", NULL, "OUT3 VMID" },
  394. { "OUT3 VMID", NULL, "Left Output Mixer" },
  395. { "OUT3 VMID", NULL, "Right Output Mixer" },
  396. };
  397. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  398. {
  399. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  400. struct wm8960_data *pdata = &wm8960->pdata;
  401. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  402. struct snd_soc_dapm_widget *w;
  403. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  404. ARRAY_SIZE(wm8960_dapm_widgets));
  405. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  406. /* In capless mode OUT3 is used to provide VMID for the
  407. * headphone outputs, otherwise it is used as a mono mixer.
  408. */
  409. if (pdata && pdata->capless) {
  410. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  411. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  412. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  413. ARRAY_SIZE(audio_paths_capless));
  414. } else {
  415. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  416. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  417. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  418. ARRAY_SIZE(audio_paths_out3));
  419. }
  420. /* We need to power up the headphone output stage out of
  421. * sequence for capless mode. To save scanning the widget
  422. * list each time to find the desired power state do so now
  423. * and save the result.
  424. */
  425. #if __NO_SND_SOC_CODEC_DRV
  426. list_for_each_entry(w, &codec->card->widgets, list) {
  427. #else
  428. list_for_each_entry(w, &codec->component.card->widgets, list) {
  429. #endif
  430. if (w->dapm != dapm)
  431. continue;
  432. if (strcmp(w->name, "LOUT1 PGA") == 0)
  433. wm8960->lout1 = w;
  434. if (strcmp(w->name, "ROUT1 PGA") == 0)
  435. wm8960->rout1 = w;
  436. if (strcmp(w->name, "OUT3 VMID") == 0)
  437. wm8960->out3 = w;
  438. }
  439. return 0;
  440. }
  441. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  442. unsigned int fmt)
  443. {
  444. struct snd_soc_codec *codec = codec_dai->codec;
  445. u16 iface = 0;
  446. /* set master/slave audio interface */
  447. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  448. case SND_SOC_DAIFMT_CBM_CFM:
  449. iface |= 0x0040;
  450. break;
  451. case SND_SOC_DAIFMT_CBS_CFS:
  452. break;
  453. default:
  454. return -EINVAL;
  455. }
  456. /* interface format */
  457. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  458. case SND_SOC_DAIFMT_I2S:
  459. iface |= 0x0002;
  460. break;
  461. case SND_SOC_DAIFMT_RIGHT_J:
  462. break;
  463. case SND_SOC_DAIFMT_LEFT_J:
  464. iface |= 0x0001;
  465. break;
  466. case SND_SOC_DAIFMT_DSP_A:
  467. iface |= 0x0003;
  468. break;
  469. case SND_SOC_DAIFMT_DSP_B:
  470. iface |= 0x0013;
  471. break;
  472. default:
  473. return -EINVAL;
  474. }
  475. /* clock inversion */
  476. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  477. case SND_SOC_DAIFMT_NB_NF:
  478. break;
  479. case SND_SOC_DAIFMT_IB_IF:
  480. iface |= 0x0090;
  481. break;
  482. case SND_SOC_DAIFMT_IB_NF:
  483. iface |= 0x0080;
  484. break;
  485. case SND_SOC_DAIFMT_NB_IF:
  486. iface |= 0x0010;
  487. break;
  488. default:
  489. return -EINVAL;
  490. }
  491. /* set iface */
  492. snd_soc_write(codec, WM8960_IFACE1, iface);
  493. return 0;
  494. }
  495. static struct {
  496. int rate;
  497. unsigned int val;
  498. } alc_rates[] = {
  499. { 48000, 0 },
  500. { 44100, 0 },
  501. { 32000, 1 },
  502. { 22050, 2 },
  503. { 24000, 2 },
  504. { 16000, 3 },
  505. { 11025, 4 },
  506. { 12000, 4 },
  507. { 8000, 5 },
  508. };
  509. /* -1 for reserved value */
  510. static const int sysclk_divs[] = { 1, -1, 2, -1 };
  511. /* Multiply 256 for internal 256 div */
  512. static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
  513. /* Multiply 10 to eliminate decimials */
  514. static const int bclk_divs[] = {
  515. 10, 15, 20, 30, 40, 55, 60, 80, 110,
  516. 120, 160, 220, 240, 320, 320, 320
  517. };
  518. static int wm8960_configure_clocking(struct snd_soc_codec *codec)
  519. {
  520. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  521. int sysclk, bclk, lrclk, freq_out, freq_in;
  522. u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
  523. int i, j, k;
  524. if (!(iface1 & (1<<6))) {
  525. dev_dbg(codec->dev,
  526. "Codec is slave mode, no need to configure clock\n");
  527. //return 0;
  528. }
  529. if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
  530. dev_err(codec->dev, "No MCLK configured\n");
  531. return -EINVAL;
  532. }
  533. freq_in = wm8960->freq_in;
  534. bclk = wm8960->bclk;
  535. lrclk = wm8960->lrclk;
  536. //printk("clk_id %d freq_in: %d bclk: %d lrclk: %d\n",wm8960->clk_id ,freq_in, bclk,lrclk);
  537. /*
  538. * If it's sysclk auto mode, check if the MCLK can provide sysclk or
  539. * not. If MCLK can provide sysclk, using MCLK to provide sysclk
  540. * directly. Otherwise, auto select a available pll out frequency
  541. * and set PLL.
  542. */
  543. if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
  544. /* disable the PLL and using MCLK to provide sysclk */
  545. wm8960_set_pll(codec, 0, 0);
  546. freq_out = freq_in;
  547. } else if (wm8960->sysclk) {
  548. freq_out = wm8960->sysclk;
  549. } else {
  550. dev_err(codec->dev, "No SYSCLK configured\n");
  551. return -EINVAL;
  552. }
  553. if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
  554. /* check if the sysclk frequency is available. */
  555. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  556. if (sysclk_divs[i] == -1)
  557. continue;
  558. sysclk = freq_out / sysclk_divs[i];
  559. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  560. if (sysclk != dac_divs[j] * lrclk)
  561. continue;
  562. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
  563. if (sysclk == bclk * bclk_divs[k] / 10)
  564. break;
  565. if (k != ARRAY_SIZE(bclk_divs))
  566. break;
  567. }
  568. if (j != ARRAY_SIZE(dac_divs))
  569. break;
  570. }
  571. if (i != ARRAY_SIZE(sysclk_divs)) {
  572. goto configure_clock;
  573. } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
  574. dev_err(codec->dev, "failed to configure clock\n");
  575. return -EINVAL;
  576. }
  577. }
  578. /* get a available pll out frequency and set pll */
  579. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  580. if (sysclk_divs[i] == -1)
  581. continue;
  582. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  583. sysclk = lrclk * dac_divs[j];
  584. freq_out = sysclk * sysclk_divs[i];
  585. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  586. if (sysclk == bclk * bclk_divs[k] / 10 &&
  587. is_pll_freq_available(freq_in, freq_out)) {
  588. wm8960_set_pll(codec,
  589. freq_in, freq_out);
  590. break;
  591. } else {
  592. continue;
  593. }
  594. }
  595. if (k != ARRAY_SIZE(bclk_divs))
  596. break;
  597. }
  598. if (j != ARRAY_SIZE(dac_divs))
  599. break;
  600. }
  601. if (i == ARRAY_SIZE(sysclk_divs)) {
  602. dev_err(codec->dev, "failed to configure clock\n");
  603. return -EINVAL;
  604. }
  605. configure_clock:
  606. /* configure sysclk clock */
  607. snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
  608. /* configure frame clock */
  609. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
  610. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
  611. /* configure bit clock */
  612. snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
  613. return 0;
  614. }
  615. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  616. struct snd_pcm_hw_params *params,
  617. struct snd_soc_dai *dai)
  618. {
  619. struct snd_soc_codec *codec = dai->codec;
  620. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  621. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  622. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  623. int i;
  624. wm8960->bclk = snd_soc_params_to_bclk(params);
  625. if (params_channels(params) == 1)
  626. wm8960->bclk *= 2;
  627. /* bit size */
  628. switch (params_width(params)) {
  629. case 16:
  630. break;
  631. case 20:
  632. iface |= 0x0004;
  633. break;
  634. case 24:
  635. iface |= 0x0008;
  636. break;
  637. case 32:
  638. /* right justify mode does not support 32 word length */
  639. if ((iface & 0x3) != 0) {
  640. iface |= 0x000c;
  641. break;
  642. }
  643. default:
  644. dev_err(codec->dev, "unsupported width %d\n",
  645. params_width(params));
  646. return -EINVAL;
  647. }
  648. wm8960->lrclk = params_rate(params);
  649. /* Update filters for the new rate */
  650. if (tx) {
  651. wm8960_set_deemph(codec);
  652. } else {
  653. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  654. if (alc_rates[i].rate == params_rate(params))
  655. snd_soc_update_bits(codec,
  656. WM8960_ADDCTL3, 0x7,
  657. alc_rates[i].val);
  658. }
  659. /* set iface */
  660. snd_soc_write(codec, WM8960_IFACE1, iface);
  661. wm8960->is_stream_in_use[tx] = true;
  662. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
  663. !wm8960->is_stream_in_use[!tx])
  664. return wm8960_configure_clocking(codec);
  665. return 0;
  666. }
  667. static int wm8960_hw_free(struct snd_pcm_substream *substream,
  668. struct snd_soc_dai *dai)
  669. {
  670. struct snd_soc_codec *codec = dai->codec;
  671. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  672. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  673. wm8960->is_stream_in_use[tx] = false;
  674. return 0;
  675. }
  676. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  677. {
  678. struct snd_soc_codec *codec = dai->codec;
  679. if (mute)
  680. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
  681. else
  682. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
  683. return 0;
  684. }
  685. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  686. enum snd_soc_bias_level level)
  687. {
  688. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  689. u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
  690. int ret;
  691. switch (level) {
  692. case SND_SOC_BIAS_ON:
  693. break;
  694. case SND_SOC_BIAS_PREPARE:
  695. switch (snd_soc_codec_get_bias_level(codec)) {
  696. case SND_SOC_BIAS_STANDBY:
  697. if (!IS_ERR(wm8960->mclk)) {
  698. ret = clk_prepare_enable(wm8960->mclk);
  699. if (ret) {
  700. dev_err(codec->dev,
  701. "Failed to enable MCLK: %d\n",
  702. ret);
  703. return ret;
  704. }
  705. }
  706. ret = wm8960_configure_clocking(codec);
  707. if (ret)
  708. return ret;
  709. /* Set VMID to 2x50k */
  710. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
  711. break;
  712. case SND_SOC_BIAS_ON:
  713. /*
  714. * If it's sysclk auto mode, and the pll is enabled,
  715. * disable the pll
  716. */
  717. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  718. wm8960_set_pll(codec, 0, 0);
  719. if (!IS_ERR(wm8960->mclk))
  720. clk_disable_unprepare(wm8960->mclk);
  721. break;
  722. default:
  723. break;
  724. }
  725. break;
  726. case SND_SOC_BIAS_STANDBY:
  727. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
  728. regcache_sync(wm8960->regmap);
  729. /* Enable anti-pop features */
  730. snd_soc_write(codec, WM8960_APOP1,
  731. WM8960_POBCTRL | WM8960_SOFT_ST |
  732. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  733. /* Enable & ramp VMID at 2x50k */
  734. snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
  735. msleep(100);
  736. /* Enable VREF */
  737. snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
  738. WM8960_VREF);
  739. /* Disable anti-pop features */
  740. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  741. }
  742. /* Set VMID to 2x250k */
  743. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
  744. break;
  745. case SND_SOC_BIAS_OFF:
  746. /* Enable anti-pop features */
  747. snd_soc_write(codec, WM8960_APOP1,
  748. WM8960_POBCTRL | WM8960_SOFT_ST |
  749. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  750. /* Disable VMID and VREF, let them discharge */
  751. snd_soc_write(codec, WM8960_POWER1, 0);
  752. msleep(600);
  753. break;
  754. }
  755. return 0;
  756. }
  757. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  758. enum snd_soc_bias_level level)
  759. {
  760. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  761. u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
  762. int reg, ret;
  763. switch (level) {
  764. case SND_SOC_BIAS_ON:
  765. break;
  766. case SND_SOC_BIAS_PREPARE:
  767. switch (snd_soc_codec_get_bias_level(codec)) {
  768. case SND_SOC_BIAS_STANDBY:
  769. /* Enable anti pop mode */
  770. snd_soc_update_bits(codec, WM8960_APOP1,
  771. WM8960_POBCTRL | WM8960_SOFT_ST |
  772. WM8960_BUFDCOPEN,
  773. WM8960_POBCTRL | WM8960_SOFT_ST |
  774. WM8960_BUFDCOPEN);
  775. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  776. reg = 0;
  777. if (wm8960->lout1 && wm8960->lout1->power)
  778. reg |= WM8960_PWR2_LOUT1;
  779. if (wm8960->rout1 && wm8960->rout1->power)
  780. reg |= WM8960_PWR2_ROUT1;
  781. if (wm8960->out3 && wm8960->out3->power)
  782. reg |= WM8960_PWR2_OUT3;
  783. snd_soc_update_bits(codec, WM8960_POWER2,
  784. WM8960_PWR2_LOUT1 |
  785. WM8960_PWR2_ROUT1 |
  786. WM8960_PWR2_OUT3, reg);
  787. /* Enable VMID at 2*50k */
  788. snd_soc_update_bits(codec, WM8960_POWER1,
  789. WM8960_VMID_MASK, 0x80);
  790. /* Ramp */
  791. msleep(100);
  792. /* Enable VREF */
  793. snd_soc_update_bits(codec, WM8960_POWER1,
  794. WM8960_VREF, WM8960_VREF);
  795. msleep(100);
  796. if (!IS_ERR(wm8960->mclk)) {
  797. ret = clk_prepare_enable(wm8960->mclk);
  798. if (ret) {
  799. dev_err(codec->dev,
  800. "Failed to enable MCLK: %d\n",
  801. ret);
  802. return ret;
  803. }
  804. }
  805. ret = wm8960_configure_clocking(codec);
  806. if (ret)
  807. return ret;
  808. break;
  809. case SND_SOC_BIAS_ON:
  810. /*
  811. * If it's sysclk auto mode, and the pll is enabled,
  812. * disable the pll
  813. */
  814. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  815. wm8960_set_pll(codec, 0, 0);
  816. if (!IS_ERR(wm8960->mclk))
  817. clk_disable_unprepare(wm8960->mclk);
  818. /* Enable anti-pop mode */
  819. snd_soc_update_bits(codec, WM8960_APOP1,
  820. WM8960_POBCTRL | WM8960_SOFT_ST |
  821. WM8960_BUFDCOPEN,
  822. WM8960_POBCTRL | WM8960_SOFT_ST |
  823. WM8960_BUFDCOPEN);
  824. /* Disable VMID and VREF */
  825. snd_soc_update_bits(codec, WM8960_POWER1,
  826. WM8960_VREF | WM8960_VMID_MASK, 0);
  827. break;
  828. case SND_SOC_BIAS_OFF:
  829. regcache_sync(wm8960->regmap);
  830. break;
  831. default:
  832. break;
  833. }
  834. break;
  835. case SND_SOC_BIAS_STANDBY:
  836. switch (snd_soc_codec_get_bias_level(codec)) {
  837. case SND_SOC_BIAS_PREPARE:
  838. /* Disable HP discharge */
  839. snd_soc_update_bits(codec, WM8960_APOP2,
  840. WM8960_DISOP | WM8960_DRES_MASK,
  841. 0);
  842. /* Disable anti-pop features */
  843. snd_soc_update_bits(codec, WM8960_APOP1,
  844. WM8960_POBCTRL | WM8960_SOFT_ST |
  845. WM8960_BUFDCOPEN,
  846. WM8960_POBCTRL | WM8960_SOFT_ST |
  847. WM8960_BUFDCOPEN);
  848. break;
  849. default:
  850. break;
  851. }
  852. break;
  853. case SND_SOC_BIAS_OFF:
  854. break;
  855. }
  856. return 0;
  857. }
  858. /* PLL divisors */
  859. struct _pll_div {
  860. u32 pre_div:1;
  861. u32 n:4;
  862. u32 k:24;
  863. };
  864. static bool is_pll_freq_available(unsigned int source, unsigned int target)
  865. {
  866. unsigned int Ndiv;
  867. if (source == 0 || target == 0)
  868. return false;
  869. /* Scale up target to PLL operating frequency */
  870. target *= 4;
  871. Ndiv = target / source;
  872. if (Ndiv < 6) {
  873. source >>= 1;
  874. Ndiv = target / source;
  875. }
  876. if ((Ndiv < 6) || (Ndiv > 12))
  877. return false;
  878. return true;
  879. }
  880. /* The size in bits of the pll divide multiplied by 10
  881. * to allow rounding later */
  882. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  883. static int pll_factors(unsigned int source, unsigned int target,
  884. struct _pll_div *pll_div)
  885. {
  886. unsigned long long Kpart;
  887. unsigned int K, Ndiv, Nmod;
  888. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  889. /* Scale up target to PLL operating frequency */
  890. target *= 4;
  891. Ndiv = target / source;
  892. if (Ndiv < 6) {
  893. source >>= 1;
  894. pll_div->pre_div = 1;
  895. Ndiv = target / source;
  896. } else
  897. pll_div->pre_div = 0;
  898. if ((Ndiv < 6) || (Ndiv > 12)) {
  899. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  900. return -EINVAL;
  901. }
  902. pll_div->n = Ndiv;
  903. Nmod = target % source;
  904. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  905. do_div(Kpart, source);
  906. K = Kpart & 0xFFFFFFFF;
  907. /* Check if we need to round */
  908. if ((K % 10) >= 5)
  909. K += 5;
  910. /* Move down to proper range now rounding is done */
  911. K /= 10;
  912. pll_div->k = K;
  913. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  914. pll_div->n, pll_div->k, pll_div->pre_div);
  915. return 0;
  916. }
  917. static int wm8960_set_pll(struct snd_soc_codec *codec,
  918. unsigned int freq_in, unsigned int freq_out)
  919. {
  920. u16 reg;
  921. static struct _pll_div pll_div;
  922. int ret;
  923. if (freq_in && freq_out) {
  924. ret = pll_factors(freq_in, freq_out, &pll_div);
  925. if (ret != 0)
  926. return ret;
  927. }
  928. /* Disable the PLL: even if we are changing the frequency the
  929. * PLL needs to be disabled while we do so. */
  930. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
  931. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
  932. if (!freq_in || !freq_out)
  933. return 0;
  934. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  935. reg |= pll_div.pre_div << 4;
  936. reg |= pll_div.n;
  937. if (pll_div.k) {
  938. reg |= 0x20;
  939. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  940. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  941. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
  942. }
  943. snd_soc_write(codec, WM8960_PLL1, reg);
  944. /* Turn it on */
  945. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
  946. msleep(250);
  947. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
  948. return 0;
  949. }
  950. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  951. int source, unsigned int freq_in, unsigned int freq_out)
  952. {
  953. struct snd_soc_codec *codec = codec_dai->codec;
  954. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  955. wm8960->freq_in = freq_in;
  956. if (pll_id == WM8960_SYSCLK_AUTO)
  957. return 0;
  958. return wm8960_set_pll(codec, freq_in, freq_out);
  959. }
  960. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  961. int div_id, int div)
  962. {
  963. struct snd_soc_codec *codec = codec_dai->codec;
  964. u16 reg;
  965. switch (div_id) {
  966. case WM8960_SYSCLKDIV:
  967. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  968. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  969. break;
  970. case WM8960_DACDIV:
  971. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  972. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  973. break;
  974. case WM8960_OPCLKDIV:
  975. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  976. snd_soc_write(codec, WM8960_PLL1, reg | div);
  977. break;
  978. case WM8960_DCLKDIV:
  979. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  980. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  981. break;
  982. case WM8960_TOCLKSEL:
  983. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  984. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  985. break;
  986. default:
  987. return -EINVAL;
  988. }
  989. return 0;
  990. }
  991. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  992. enum snd_soc_bias_level level)
  993. {
  994. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  995. return wm8960->set_bias_level(codec, level);
  996. }
  997. static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  998. unsigned int freq, int dir)
  999. {
  1000. struct snd_soc_codec *codec = dai->codec;
  1001. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  1002. clk_id = WM8960_SYSCLK_PLL;
  1003. switch (clk_id) {
  1004. case WM8960_SYSCLK_MCLK:
  1005. snd_soc_update_bits(codec, WM8960_CLOCK1,
  1006. 0x1, WM8960_SYSCLK_MCLK);
  1007. break;
  1008. case WM8960_SYSCLK_PLL:
  1009. snd_soc_update_bits(codec, WM8960_CLOCK1,
  1010. 0x1, WM8960_SYSCLK_PLL);
  1011. break;
  1012. case WM8960_SYSCLK_AUTO:
  1013. break;
  1014. default:
  1015. return -EINVAL;
  1016. }
  1017. wm8960->freq_in = 24000000;
  1018. wm8960->sysclk = freq;
  1019. wm8960->clk_id = clk_id;
  1020. return 0;
  1021. }
  1022. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  1023. #define WM8960_FORMATS \
  1024. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1025. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1026. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  1027. .hw_params = wm8960_hw_params,
  1028. .hw_free = wm8960_hw_free,
  1029. .digital_mute = wm8960_mute,
  1030. .set_fmt = wm8960_set_dai_fmt,
  1031. .set_clkdiv = wm8960_set_dai_clkdiv,
  1032. .set_pll = wm8960_set_dai_pll,
  1033. .set_sysclk = wm8960_set_dai_sysclk,
  1034. };
  1035. static struct snd_soc_dai_driver wm8960_dai = {
  1036. .name = "wm8960-hifi",
  1037. .playback = {
  1038. .stream_name = "Playback",
  1039. .channels_min = 1,
  1040. .channels_max = 2,
  1041. .rates = WM8960_RATES,
  1042. .formats = WM8960_FORMATS,},
  1043. .capture = {
  1044. .stream_name = "Capture",
  1045. .channels_min = 1,
  1046. .channels_max = 2,
  1047. .rates = WM8960_RATES,
  1048. .formats = WM8960_FORMATS,},
  1049. .ops = &wm8960_dai_ops,
  1050. .symmetric_rates = 1,
  1051. };
  1052. static int wm8960_probe(struct snd_soc_codec *codec)
  1053. {
  1054. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  1055. struct wm8960_data *pdata = &wm8960->pdata;
  1056. if (pdata->capless)
  1057. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  1058. else
  1059. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  1060. snd_soc_add_codec_controls(codec, wm8960_snd_controls,
  1061. ARRAY_SIZE(wm8960_snd_controls));
  1062. wm8960_add_widgets(codec);
  1063. return 0;
  1064. }
  1065. static const struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  1066. .probe = wm8960_probe,
  1067. .set_bias_level = wm8960_set_bias_level,
  1068. .suspend_bias_off = true,
  1069. #if __NO_SND_SOC_CODEC_DRV
  1070. .idle_bias_on = 1,
  1071. .use_pmdown_time = 1,
  1072. .endianness = 1,
  1073. .non_legacy_dai_naming = 1,
  1074. #endif
  1075. };
  1076. static const struct regmap_config wm8960_regmap = {
  1077. .reg_bits = 7,
  1078. .val_bits = 9,
  1079. .max_register = WM8960_PLL4,
  1080. .reg_defaults = wm8960_reg_defaults,
  1081. .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
  1082. .cache_type = REGCACHE_RBTREE,
  1083. .volatile_reg = wm8960_volatile,
  1084. };
  1085. static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
  1086. struct wm8960_data *pdata)
  1087. {
  1088. const struct device_node *np = i2c->dev.of_node;
  1089. if (of_property_read_bool(np, "wlf,capless"))
  1090. pdata->capless = true;
  1091. if (of_property_read_bool(np, "wlf,shared-lrclk"))
  1092. pdata->shared_lrclk = true;
  1093. }
  1094. static int wm8960_i2c_probe(struct i2c_client *i2c,
  1095. const struct i2c_device_id *id)
  1096. {
  1097. struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
  1098. struct wm8960_priv *wm8960;
  1099. int ret;
  1100. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  1101. GFP_KERNEL);
  1102. if (wm8960 == NULL)
  1103. return -ENOMEM;
  1104. wm8960->clk_id = WM8960_SYSCLK_PLL;
  1105. wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
  1106. if (IS_ERR(wm8960->mclk)) {
  1107. if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
  1108. return -EPROBE_DEFER;
  1109. }
  1110. wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
  1111. if (IS_ERR(wm8960->regmap))
  1112. return PTR_ERR(wm8960->regmap);
  1113. if (pdata)
  1114. memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
  1115. else if (i2c->dev.of_node)
  1116. wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
  1117. ret = wm8960_reset(wm8960->regmap);
  1118. if (ret != 0) {
  1119. dev_err(&i2c->dev, "Failed to issue reset\n");
  1120. return ret;
  1121. }
  1122. if (wm8960->pdata.shared_lrclk) {
  1123. ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
  1124. 0x4, 0x4);
  1125. if (ret != 0) {
  1126. dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
  1127. ret);
  1128. return ret;
  1129. }
  1130. }
  1131. /* Latch the update bits */
  1132. regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
  1133. regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
  1134. regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
  1135. regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
  1136. regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
  1137. regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
  1138. regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
  1139. regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
  1140. regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
  1141. regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
  1142. i2c_set_clientdata(i2c, wm8960);
  1143. ret = snd_soc_register_codec(&i2c->dev,
  1144. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  1145. return ret;
  1146. }
  1147. static int wm8960_i2c_remove(struct i2c_client *client)
  1148. {
  1149. snd_soc_unregister_codec(&client->dev);
  1150. return 0;
  1151. }
  1152. static const struct i2c_device_id wm8960_i2c_id[] = {
  1153. { "wm8960", 0 },
  1154. { }
  1155. };
  1156. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  1157. static const struct of_device_id wm8960_of_match[] = {
  1158. { .compatible = "wlf,wm8960", },
  1159. { }
  1160. };
  1161. MODULE_DEVICE_TABLE(of, wm8960_of_match);
  1162. static struct i2c_driver wm8960_i2c_driver = {
  1163. .driver = {
  1164. .name = "wm8960",
  1165. .of_match_table = wm8960_of_match,
  1166. },
  1167. .probe = wm8960_i2c_probe,
  1168. .remove = wm8960_i2c_remove,
  1169. .id_table = wm8960_i2c_id,
  1170. };
  1171. module_i2c_driver(wm8960_i2c_driver);
  1172. MODULE_DESCRIPTION("ASoC WM8960 driver");
  1173. MODULE_AUTHOR("Liam Girdwood");
  1174. MODULE_LICENSE("GPL");